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Systems-on-сhip by STMicroelectronics

STMicroelectronics offers a wide range of chips for designing navigation devices with various technical features, from portable low-consumption trackers to on-board navigation systems with a rich graphic interface.

Navigation system components

  • LNA, a low-noise radio frequency amplifier which amplifies the antenna signal within the range of 1.575 GHz. Usually, the list of components also includes a SAW filter to increase interference resistance
  • RF front end, a mixer and a heterodyne which transfer the signal to the low-frequency area, an intermediate frequency filter, an AGC and ADC amplifier
  • Baseband processor, a signal processor which performs digital filtration and demodulation of the signal
  • Position processor, a microcontroller or a microprocessor which performs post-processing of navigation data and provides access to them through one of the standard protocols such as NMEA
 

ST Teseo/Cartesio processor family

The Teseo/Cartesio system-on-chip family brings together baseband and position processors, as well as an extensive set of peripherals which help design a navigation device with a minimum of external components. There is also a chip version for Teseo, which includes an RF frontend, as well as baseband and position processors in one package.

STA2058 Teseo processor

STA2058 Teseo key features:

  • 0.18-micron technology, powered by one 3.3V source, low power consumption, ambient temperature range: − 40 ... +85 ° C
  • ARM7TDMI Kernel, 32-bit RISC, JTAG
  • Integrated flash memory 256 KB + 16 KB, 64 KB SRAM
  • External memory interface: 4 banks, addressing up to 64 MB
  • 16-channel high-performance GPS correlator with DSP
  • Galvanically isolated real-time clock with Wake on Schedule
  • Two CAN controllers (2.0 part A and B protocol version), speed up to 1 Mbit/s
  • Four 16-bit general-purpose timers (capture, compare, count, PWM)
  • A rich set of serial interfaces: four UART, two SPI, two  I²C and USB
  • ISO 7816-3 smart card interface
  • HDLC controller (includes NRZI, FM0 and Manchester encoding)
  • 4-channel 12-bit DAC (sigma-delta)
  • Voltage converters to power the processor and peripherals
 

STA2062 Carteseo processor

STA2062 Cartesio key features:

  • ARM926 EJ-S CPU @ 260/351 MHz
  • 90 nm HCMOS technology
  • Digital signal processor (DSP) ARM (single-step MAC) and Jazelle Java accelerator
  • SDRAM/mDDR-DRAM, NAND/NOR Flash
  • High-performance 32-channel GPS correlator with DSP + ARM7TDMI
  • A rich set of serial interfaces (UART, SSP, I²C)
  • Two CAN controllers (CAN 2.0 B)
  • Graphic controller supporting a resolution of up to 1024x1024 px
  • Two USB controllers (on-the-go and device modes, 1xFS,1xHS)
  • Hardware audio stream sample rate converter (44.1 kHz <> 48 kHz)
  • A large number of serial ports (I²S, PCM, T1/D1, SPI, AC97)
  • Two Secure Digital and Multimedia Card interfaces for external flash cards
  • C3/block decoder for an CD drive
  • LFBGA 361 package (0.8 mm ball pitch)
 

Summary table for the Cartesio family SoCs

Feature
STA2062 Cartesio
STA2064/5 Cartesio+
Central processing unit
ARM946
ARM1176
CPU speed
351 MHz
624 MHz
Caches
16К + 16К
32К + 32К
Floating point operation accelerator
no
yes
Integrated RAM
64 KB
32 KB
Number of system buses
5х32 bit
9x32 bit
System bus speed
166 MHz
208 MHz
DDR support
SDRAM/LPDDR
LPDDR/DDR2
DDR bus width
16 bit
16/32 bit
2D/3D graphic accelerator
no
yes
JPEG accelerator
no
yes
Video input
no
CCIR656
USB controller (dual mode)
1 x USB1.1; 1 x USB 2.0
2 x USB 2.0
Physical USB interface
1 x USB 1.1
1 x USB 2.0; 1 x USB 1.1
SD/MMC storage card interface
ADC and touch screen controller
no
8 channels (10-bit)
Smartcard interface
no
yes
GPS processor
ARM7TDMI
ARM946
GPS correlator
GPS
GPS and Galileo
Input-output supply voltage
1.8 V and 2.5 V
1.8 V; 2.5 V and 3.3 V
 

ST SPEAr processor family

Modern embedded CPU devices require systems-on-chip with an ever-increasing computing performance and energy efficiency for applications such as communications, management, security, multimedia and computing.

The SPEAr line of processors boasts outstanding technical features and is designed to meet this demand. The SPEAr family of embedded processors is based on ARM cores: one ARM 926EJ-S core for the SPEAr300 Series, dual-core ARM926EJ-S for the SPEAr600 Series, and dual-core ARM Cortex-A9 for the SPEAr1300 Series.

Key Features of SPEAr Processors

  • The family includes a number of models with different numbers of cores and  varying performance
  • Each series contains a set of processors designed for a specific narrow field of application
  • All SPEAr processors include an external dynamic memory controller
  • Excellent energy efficiency in these processors helps increase the battery life of portable devices, as well as make it easier to pass the most stringent certification tests
  • The processors use a standard processor architecture supported by a host of third-party development tools
 

SPEAr300 processor

The SPEAr 300 contains everything that is necessary for applications which require low power consumption and developed electrical interfaces:  IP telephony, graphic terminals, security systems, etc.

SPEAr300 SoC key features:

  • ARM 926EJ-S core, 400 MHz
  • High-performance eight-channel direct memory access (DMA)
  • Interfaces:
    • USB 2.0 (2 host, 1 device)
    • Fast Ethernet (MII port)
    • SPI, I2C, I²S, UART and fast IrDA
    • Up to eight I²C/SPICS signals
  • TDM bus (512 time slots)
  • Supported peripherals:
    • Camera interface (ITU-601/656 and CSI2 support)
  • LCD controller (resolution up to 1024x768 with color depth up to 24 bpp)
  • Touch screen support
  • 9x9 keyboard controller
  • Connection of up to eight SLIC or audio codecs
 

SPEAr310 processor

The SPEAr310 targets applications in telecommunications and contains a large number of Ethernet ports (1 MII and 4 SMII), as well as two HDLC ports.

SPEAr310 key features:

  • ARM926EJ-S core, 400 MHz
  • High-performance 8-channel direct memory access (DMA)
  • Interfaces:
    • USB 2.0 (2 hosts, 1 device)
    • 1 fast Ethernet MII port
    • 4 fast Ethernet SMII ports
    • SPI, I2C and fast IRDA interfaces
    • 6 UART interfaces
    • TDM bus (128 timeslots with 64 HDLC channels)
    • 2 HDLC ports with RS-485 support
  • Other functions:
    • Integrated real-time clock
    • Watchdog and system controller
    • 8-channel, 10-bit ADC, 1 MSPS
    • JPEG codec accelerator
    • 6 general-purpose 16-bit timers with capture mode and programmable prescaler
    • Up to 102 GPIOs with interrupt capability
 

SPEAr320 processor

The SPEAr320 is designed for consumer electronics and production process automation equipment and contains an LCD controller (resolution: 1024x768) with touch screen support, as well as a number of ports and interfaces.

SPEAr320 key features:

  • ARM926EJ-S core, 400 MHz
  • High-performance 8-channel DMA
  • Interfaces:
    • USB 2.0 (2 hosts, 1 device)
    • 2 fast Ethernet ports (MII/SMII ports)
    • 2 CAN interfaces
    • I2S and fast IRDA interfaces
    • 3 SPI ports
    • 2 I2C interfaces
    • 3 UART interfaces
    • 1 standard parallel device port
  • Supported peripherals:
    • LCD controller (resolutions up to 1024 x 768 and up to 24 bpp)
    • Touch screen support
  • Other functions:
    • Integrated real-time clock,
    • Watchdog and system controller
    • 8-channel, 10-bit ADC, 1 MSPS
    • JPEG codec accelerator
    • 6 general-purpose 16-bit timers with capture mode and programmable prescaler
    • Up to 102 GPIOs with interrupt capability
 

SPEAr600 processor

High-performance ARM926EJ-S processor cores make the SPEAr600 SoC an excellent choice for applications that require increased computing power.

SPEAr600 key features:

  • Two ARM926EJ-S cores, 400 MHz
  • High-performance 8-channel DMA (direct memory access)
  • Performance up to 733 DMIPS
  • Interfaces:
    • USB 2.0 (2 hosts, 1 device)
    • 1 Giga Ethernet port (GMII port)
    • I2C and fast IrDA interfaces
    • 3 SPI ports
    • 3 I2S interfaces (1 stereo input, 2 stereo outputs)
    • 2 UART interfaces
  • Supported peripherals:
    • LCD controller (resolutions up to 1024 x 768 and up to 24 bpp)
    • Touch screen support
  • Other functions:
    • Integrated real-time clock,
    • Watchdog and system controller
    • 8-channel, 10-bit ADC, 1 MSPS
    • JPEG codec accelerator
    • 10 general-purpose 16-bit timers with capture mode and programmable prescalers
    • 10 GPIOs with interrupt capabilities
    • External 32-bit local bus
 

SPEAr1310 processor

The SPEAr1310 with two ARM Cortex-A9 processor cores and the DDR3 memory interface is a combination of computing power and advanced power-saving technologies. The SPEAr1310 is designed to be used in the development of low-cost and low-power network devices for home or small business, as well as for telecommunications equipment. This device is based on the new ARMv7 core and includes a C3 security coprocessor and an extended set of interfaces.

SPEAr1310 key features:

  • Two  ARMCortex-A9 cores, 600 MHz
  • Support for the SMP and AMP operating systems
  • 64-bit multi-level network-on-chip bus
  • Interfaces:
    • Giga/Fast Ethernet ports
    • 3x PCIe 2.0 / SATA
    • 3x USB 2.0 (Host/OTG)
    • 2x CAN 2.0 a/b
    • 2x HDLC RS485
    • I2S, UART, I2C and SPI ports
  • Supported peripherals:
    • TFT LCD display of up to 1920 x 1080 (60 Hz)
    • Touch screen interface
    • 9 x 9 keyboard
    • Memory card interface
  • Energy efficiency:
    • Galvanic fragmentation of chain segments to reduce leakage currents
    • Dynamic clocking control
    • Dynamic oscillator frequency control
 

SPEAr1340 processor

The SPEAr1340 integrates a powerful graphic core, ARM Mali-200, with 2D/3D acceleration support. The processor is designed for user interface development, navigation, web browsing and gaming. It includes a video codec that supports major compression standards (including H.264 and AVS), with a resolution of up to 1080p and 30 frames per second. These features allow for the use of the SPEAr1340 in applications that require simultaneous processing of multiple video streams, such as video surveillance or conference video applications.

Despite its outstanding performance parameters, the SPEAr1340 remains a rather low-power processor. The system includes two Cortex-A9 cores which provide a performance increase by up to two times, when using the SMP OS.

The SPEAr1340 is also well-suited for input-output multichannel audio streams using the I2S bus or S / PDIF interface.

To be used in security systems, the SPEAr1340 SoC contains a multistandard cryptographic core and one-time programmable memory (OTP) registers for unique identification and tamper-resistant, or anti-tamper, systems.

Created using the 55 nm HCMOS technological process, this new processor inherits the SPEAr1300 architecture which combines unrivaled low consumption, the computing power of two processor cores and an innovative technology called network-on-chip (NoC).

SPEAr1340 key features:

  • Two ARMCortex-A9 cores, 600 MHz
  • Support for the SMP and AMP operating systems
  • 64-bit multi-level network-on-chip bus
  • ARM Mali-200 2D/3D graphic processor (GPU) up to 1080p, OpenGLES 2.0, OpenVG 2.0
  • Multimedia:
    • Multistandard HD video recorder/decoder, resolution of up to 1080p
    • Digital video port which helps configure up to 4 video camera interfaces
    • Multichannel audio 7.1
  • Interfaces:
    • Giga/Fast Ethernet ports
    • 1x PCIe 2.0 / SATA
    • 3x USB 2.0 (Host/OTG)
    • I2S, UART and I2C
  • Supported peripherals:
    • TFT LCD display up to 1920 x 1080 (60 Hz)
    • Touch screen interface
    • 9 x 9 keyboard
    • Memory card interface
  • Energy efficiency:
    • Galvanic fragmentation of chain segments to reduce leakage currents
    • Dynamic clocking control
    • Dynamic oscillator frequency control
 

 

 

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